AREA OF INTEREST:

• 1. VLSI
  2. Communication Networks
  3. Logic Circuit Design
  4. Analog Circuits

EDUCATIONAL PROFILE:

• M.E - in VLSI DESIGN,2010 MAY, Amrita Institute of Engineering, Bangalore.
  B.Tech - in ELECTRONICS AND COMMUNICATION ENGG, 2007 MAY, ICET, MULAVOOR

PROFESSIONAL EXPERIENCE:

• Teaching – 8 years

PROJECTS HANDLED:

• 1. Micro-controller based Counting System.
  2. Credit Card Security System with finger print identification technology.
  3. FPGA Based Power Management System. [M.E Project]

PUBLICATION IN JOURNAL:

• 1. Published a research paper titled ‘Enhancing Performance of MIO Security in Wireless Communications through Shannon-Kotel’ nikov Mapping’ in IJAREEIE March 2018.
  2. Published a research paper titled ‘IoT Based Energy Meter’ in IJAREEIE March 2018.
  3. Published a research paper titled ‘A Novel Spatial Modulation Scheme Using Trellis Code’ in IJAREEIE March 2017.
  4. Published a research paper titled ‘DETECTION OF DROWSINESS USING EEG’ in IJAREEIE, March 2017.
  5. Published a research paper titled ‘FPGA Based Pulse Amplitude Modulation
  6. Scheme Using DFL’, March 2017.
  7. Published a research paper titled ‘Detection of Image Region Duplication’ in IJAREEIE, March 2017.
  8. Published a research paper titled ‘Erasure Channel Coding Future Space Mission’in IJAREEIE, March 2017.

PUBLICATION IN CONFERENCE:

• 1. Published a research paper titled ‘FPGA Based Power Management System’ in the international conference, March 2010.

PARTICIPATION:

• 1. Attended National Conference on recent advances in electrical and electronics engineering, March 2015.
  2. Attended National Conference on Signal Processing, Instrumentation and Communication Engineering, MAR 2016.

DUTIES & RESPONSIBILITIES:

• 1. College Time Table Coordinator.
  2. Department Lab Setting and Purchase In charge.
  3. Alumni Coordinator.
  4. Lab in charge of Communication Networks Lab.